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Reliability Enhancement of Industrial Capacitor Banks through Smooth Engagement to the Grid
autorzy: Janitha Mendis, Thisum Erandima, Mrs. Warunika Happola, Dr. Chanakya Pannila
Innovation was designed to improve the lifetime of the power factor correction industrial capacitor banks in developing countries (Sri Lanka). The improvements were achieved by advancing an existing capacitor bank switching mechanism (Pre- Insertion Resistor). Simplicity and Cost were the primary concerns of this research. Most of the industries with inductive loads result in a lower power factor due to the lagging power factor quality of inductive loads. Higher inductive loads used in industries result in a low power factor in their power system. To counterbalance the above effects, capacitor banks are used in most industrial buildings as capacitors possess a leading power factor quality. Improvement of the power factor maintains the quality of the power system; by avoiding any blackouts due to excess demand of power, increases energy efficiency and reduces electricity costs, and reduces failure of electric instruments. However, the reliability of capacitor banks is a problem, because failures of capacitors are more frequent in the industry. There are considerable occurrences that affect the lifetime of the capacitor banks. A few of those occurrences can be mentioned as; inadequate voltage rating, ferroresonance, operation of capacitors at high temperatures, transient voltages, and currents mainly due to capacitor banks switching, and harmonics . In this study, standard transients were given in order to analyze responses of capacitor banks and power systems and analyzed the capacitor bank switching transients for real-world power system models using MATLAB-Simulink simulation environment as the initial stage. Then the Pre-Insertion Resistor Intermediate Step (PIRIS) capacitor bank smooth switching mechanism has been introduced by advancing the existing Pre-Insertion Resistor protective mechanism. Testing was carried out by comparing the results without any protection, protection with PIR and with the proposed solution (PIRIS mechanism) in real-world Low voltage (World Trade Center) power system and Medium voltage (Refereed published paper) power system models using MATLAB simulink in order to give more credibility. The Pre Insertion resistor values and resistor path switching times were optimized using simulations. Furthermore, the consideration of using mechanical relays for switching purposes instead of SSR switching and the implementation of small capacitance steps when switching are considered in this study via simulations. Based on the above research findings, the designed product is developed as a prototype to demonstrate the proposed product. The prototype demonstrates power factor, Apparent power, active power, voltage, current, whether the load is lagging or leading, and switches on the required capacitors via PIRIS switching mechanism utilizing atmega IC, SSRs, counters and LCD display, etc.
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IT
Medal
Brązowy Medal
Ochrona własności intelektualnej
Patent - zgłoszony
poziom gotowości technologicznej
TRL 5 prototyp